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System verilog - Data types and arrays
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Presentation on System verilog - Data types and arrays( Dynamic and associative ) with examples
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Language constraints• Comments : // OR /* */
• Variables
• Keywords
• Built-in functions
• Operators
• Numbers
• Data types
,• Built- in Functions
➢ Starts with a $ symbol
➢ $display
➢ $finish, $stop, $exit
➢ $time
➢ $random
• Operators
➢ Unary,Binary & Conditional operators
• Numbers
➢ Integer and Real numbers
, Data types
Data structures most useful for verification.
• System Verilog introduces new data types with the following
benefi ts.
• Two-state: better performance, reduced memory usage
• Queues, dynamic and associative arrays: reduced memory
usage, built-in support for searching and sorting
• Classes and structures: support for abstract data structures
• Unions and packed structures: allow multiple views of the same
data
• Strings: built-in string support
• Enumerated types: code is easier to write and understand
, Built-in data types:
• Verilog-1995 has two basic data types: variables and nets, both which hold
4-state values: 0, 1, Z, and X. RTL code uses variables to store
combinational and sequential values.
• Variables can be unsigned single or multi-bit ( reg [7:0] m ), signed 32-bit
variables ( integer ), unsigned 64-bit variables ( time ), and floating point
numbers ( real ).
• Verilog-2001 allows you to switch between static and dynamic storage,
such as stacks.
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