These documents contain summaries of the information required for the OCR exams for A level Computer Science. They are split into each unit and contains all the necessary information and some which may or may not necessarily be needed at the time, however it is all useful to the course.
Answer: Clock Speed
Number of Cores
Type and size of Cache Memory
5.
What are the 2 main types of Computer Architecture?
Answer: Von Neumann Architecture
Harvard Architecture
Input, Output and Storage
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Some examples from this set of practice questions
1.
What does RISC stand for?
Answer: Reduced Instruction Set Computing
2.
What does CISC stand for?
Answer: Complex Instruction Set Computing
3.
What is a GPU?
Answer: Graphics Processing Unit.
4.
What are the 3 main types of storage?
Answer: Optical
Magnetic
Flash
5.
What are examples of Optical Storage?
Answer: CD
DVD
Blu-Ray
Content preview
Structure and function of the processor:
Components of a processor:
The processor is basically the brain of a computer. It executes instructions and allows programs to
run.
Arithmetic Logic Unit:
The Arithmetic Logic Unit (ALU) completes all operations that are arithmetical or logical. Arithmetical
operations are mathematical operations, such as addition or subtraction of fixed- or floating-point
numbers. Logical operations include Boolean logic operations, such as AND, OR, NOT, XOR.
Control Unit:
The Control Unit is the component that directs the operations of the CPU. These operations are:
Controlling and coordinating the activities of the CPU
Managing data flow between the CPU and other devices
Accepting the next instruction
Decoding instructions
Storing the resulting data back in memory
Registers:
Registers are small memory cells that operate at a high speed. They are used to temporarily store
data and all arithmetic; logical and shift operations occur here.
Registers Purpose
Program Counter (PC) Holds the address of the next instruction to be executed.
Accumulator (ACC) Stores the results from calculations.
Memory Address Register (MAR) Holds the address of a location that is to be read from or
written to.
Memory Data Register (MDR) Temporarily stores data that has been read or needs to be
written.
Current Instruction Register Holds the current instruction being executed, the instruction is
(CIR) divided into operand and opcode.
Buses:
Buses are a set of parallel wires that connect 2 or more components within the CPU. There are three
types of buses:
Data bus
Address bus
Control bus
These are collectively called system busses. The width of the bus is directly proportional to the
number of bits that can be simultaneously transferred at a given time.
Data bus:
The data bus is a bi-directional bus. It is used for transporting data and instructions between
components.
, Address bus:
The address bus is used to transmit the memory addresses that specify where data is to be sent or
retrieved. The width of the address bus is proportional to the number of addressable memory
locations.
Control bus:
The control bus is a bi-directional bus and is used to transmit control signals between internal and
external components. These signals include:
Bus request-Shows that a device is requesting the use of the data bus
Bus grant-Shows that the CPU has granted access to the data bus
Memory write-Data is written to the addressed location
Memory read-Data is read from a specific location
Interrupt request-Shows that a device is requesting access to the CPU
Clock-Used to synchronise operations
Assembly language:
Assembly code uses mnemonics to represent instructions, such as ADD which represents addition.
The instructions are divided into operand and opcode in the CIR. The operand contains the data or
the address of the data which the operation is to be performed. The opcode specifies the type of
instruction to be executed.
Pipelining:
Pipelining is the process of completing the Fetch-Decode-Execute cycles of 3 separate instructions at
the same time. While one instruction is executed, one is decoded and one is fetched.
Fetch-Decode-Execute Cycle:
The Fetch-Decode-Execute cycle is the sequence of operations that are completed in order to
execute an instruction.
Fetch:
Address from the PC is copied to the MAR
Instruction held at that address is copied to the MDR by the Data bus
Simultaneously the contents of the PC are increased by 1
The value held in the MDR is copied to the CIR
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