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COMP32211 Implementing System-on-Chip Designs.pdf
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COMP32211Two hours
Question ONE is COMPULSORY
UNIVERSITY OF MANCHESTER
SCHOOL OF COMPUTER SCIENCE
Implementing System-on-Chip Designs
Date: Monday 18th January 2016
Time: 14:00 - 16:00
Please answer Question 1 and also
TWO other questions from the remaining FOUR Questions provided
This is a CLOSED book examination
The use of electronic calculators is NOT permitted
[PTO]
, COMP32211
Section A
This question is compulsory.
Answer any ten of the subsections.
Each subsection carries two marks.
1. a) What is ‘clock skew’? (2 marks)
b) Estimate (to about one significant figure) the memory bandwidth needed to read out
data for a ‘high-resolution’ colour graphics display. You may define an appropriate
resolution, as long as it is reasonable but you must clearly state the parameters you
choose and the units for your answer. (2 marks)
c) During the ASIC ‘place and route’ process, in an initial placement of standard cells
the desired gates will be interspersed with inactive ‘spacer’ cells. Why is this?
(2 marks)
d) Why is ‘leakage’ in CMOS transistors more a concern now than it was 10 years
ago? (2 marks)
e) Write down the truth table for the transistor circuit shown in figure 1. (2 marks)
Figure 1:
f) What is the difference in definition between static and dynamic power dissipation
in a CMOS ASIC? Which of these should be the more important design concern in
a chip for a utility supplier’s gas ‘smartmeter’ – and why? (2 marks)
g) ‘JTAG’ can provide serial test access to parts of an SoC. Why is a serial interface
convenient? What else is the interface sometimes useful for? (2 marks)
h) When implementing an SoC, what is meant by ‘technology mapping’?
(2 marks)
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