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CSC 153MICROPROCESSOR
Second Semester
BSc.CSIT
Presented by:
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1. Introduction
1.1 History of microprocessor
One of the greatest inventions that have changed man‟s life is the computer. History reveals
that the evolution of computer started with the development of calculator. Firstly there were
mechanical computers which have now evolved to electronic ones. The mechanical
computers which cannot be put aside are „difference engine‟ and „analytical engine‟. Both of
them were developed by Charles Babbage, the father of the computer.
The „difference engine‟ was a mechanical device that could add and subtract, but could only
run a single algorithm. Its output system was incompatible to write on medium such as
punched cards and early optical disks. The „analytical engine‟ was a improvement on
„difference engine‟ and provided features such as: the store (memory), the mill (computation
unit), input section (punched card reader) and output section (punched and printed output).
The store consisted of 1000 words of 50 decimal digits used to hold variables and results. The
mill could accept operands from the store, add, subtract, multiply or divide them, and return a
result to the store. The great advantage of the analytical engine was that it was general
purpose. It read instructions from punched cards and carried them, out. By punching a
different program on the input cards, it was possible to have the analytical engine perform
different computations.
The evolution of the vacuum tubes led the development of computers into a new era. The
world‟s first general purpose electronic digital computer was ENIAC (Electronic Numerical
Integrator and calculator). It was designed and constructed under the supervision of John
Mauchly and John Presper Eckert at the University of Pennsylvania. The ENIAC built by
using vacuum tubes was enormous in size and consumed very high power. However it was
faster than mechanical computers.
The ENIAC was a decimal machine, in which the numbers were in decimal number system
and the arithmetic was also performed in the same number system. Its memory consisted of
20 „accumulators‟ each capable of holding a 10 digit decimal numbers. Each digit was
represented by the „ON‟ state of the vacuum tubes. The main drawback of the ENIAC was
that it had to be programmed manually by setting switches and plugging and unplug cables.
1.2 Calculator and Stored Program Computer
A calculator is a data processing device that carries out logic and arithmetic operations, but
has limited programming capability for the user. The calculator accepts data from a small
keyboard, one digit at a time, performs the required arithmetic and logical calculation and
show the result on visual display via LCD or LED. The calculator‟s programs are stored in
ROM (Read only Memory) while the data from users are stored in RAM (Random access
Memory).
1.3 Von Neumann and Harvard architecture
As we know the task of entering and altering the programs for the ENIAC was extremely
tedious. The programming process could be facilitated if the program could be represented in
a form suitable for storing in memory alongside the data. Then a computer could get its
instructions by reading them from the memory and a program could be set or altered by
Prepared by Prakash Bhusal 1
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setting the values of a portion of memory. This approach is known as „stored program
concept‟ and was first adopted by John von Neumann. Hence, this architecture is also called
Von-Newman’s architecture. The general structure of this architecture is shown below.
ALU
Main I/O
Memory equipment
PCU
Figure: Von Neumann architecture
As shown in figure 1.1, the main memory is used to store both data and instructions. The
ALU is capable of performing arithmetic and logical operations on binary data. The program
control unit interprets the instructions in memory and causes them to be executed. The I/O
unit gets operated from the control unit.
The Von-Neumann‟s Architecture is the fundamental basis for the architecture of today‟s
digital computers. Thus it is important to have an idea of the internal structures of the central
processing unit (CPU), program control unit of Von-Neumann‟s machine.
The memory of the Neumann‟s machine consists of 1000 storage locations, called words of
40 binary digits (bits). Both data and instructions are stored in it. The control unit operates the
computer by fetching instructions from memory and executing them one at a time. The
storage locations of the control unit and ALU are called registers. The various registers of this
model are:
MBR (Memory Buffer Register): consists of a word to be stored in memory or is used
to receive a word from memory.
MAR (Memory Address Register): contains the address in memory of the word to be
written from or read into the MBR.
IR (Instruction Register): contains the 8-bit op code instruction being executed.
IBR (Instruction Buffer Register): used to temporarily hold the instruction from a
word in memory.
PC (Program Counter): contains the address of the next instruction to be fetched from
memory.
The Accumulator (AC) and the Multiplier Quotient (MQ) are employed to
temporarily hold the operands and results of ALU operations.
In Von-Neumann‟s architecture, the same memory is used for storing instructions and data.
Similarly, a single bus called data bus or address bus is used for reading data and instructions
from or writing data and instructions to the memory. Later, it was revealed that this feature of
Von-Neumann‟s architecture limited the processing speed of the computer. So in order to
improve the processing speed of the computer, Harvard architecture was evolved.
Prepared by Prakash Bhusal 2
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The Harvard architecture consists of separate memory location for the programs and data.
Each memory space has its own address and data buses. As a result of this both instruction
and data can be fetched from memory concurrently. Thus a significant processing speed
improvement is observed over Von-Neumann type architecture. The Harvard architecture is
shown below:
Address
Bus Program Memory Address Bus
MUx
Central Program Data
Control Control Arithmetic Counter Memory Program Data
Bus Unit unit related address memory memory
hardware arithmeti
c unit
Data
Bus MUx
Program Memory Control Bus
Fig: Block diagram of a Harvard architecture based microprocessor
From the figure, we see there are two data and two addresses buses, for the program and data
memory spaces separately. The program memory data bus and data memory data bus are
multiplexed to form single data bus where as program memory address bus and data memory
address bus are multiplexed to form a single address bus. Hence there are two blocks of RAM
chips, one for program memory and other for data memory space. The data memory address
arithmetic unit generates data memory addresses. The data memory address bus carries the
memory address of the data where as the program memory address bus carries the memory
address of the instruction. There is a central arithmetic logic unit (ALU), which consists of
the ALU, the multiplier, accumulator, and scaling chief register. The program counter is used
to address program memory. The PC contents are updated following each instruction decode
operation. The control unit controls the sequence of operations to be executed. The data and
control bus are bi directional where as address bus is unidirectional.
1.4 Simple stored program computer architecture
See Von Neumann architecture
1.5 Microprocessor Architecture (8 bit)
The 8085A is an 8 bit general purpose microprocessor capable of addressing 64K of memory.
The main components of the 8085 include the ALU, timing and control unit, Instruction
register and decoder, Register array. These are linked by an internal data bus.
The ALU
The arithmetic/logic unit performs the computing functions; it includes the accumulator the
temporary register, the arithmetic and logic circuits, and five flags. The temporary register is
used to hold the data during an arithmetic/logic operation. The result of the operation is
stored in the accumulator and flags are set or reset according to the result of operation. Flags
generally reflect data conditions in the accumulator.
Prepared by Prakash Bhusal 3
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