TPC 291 DIGITAL LOGIC FUNDAMENTALS EXAM QUESTIONS AND 100% ACCURATE ANSWERS.
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Course
TPC
Institution
TPC
TPC 291 DIGITAL LOGIC FUNDAMENTALS EXAM
QUESTIONS AND 100% ACCURATE ANSWERS.
D-type flip-flops have? - One D input and one clock input
Equality is a condition in which input logic states are? - Not complimentary
You are given a defective logic circuit to troubleshoot, repair, and calibrate your...
TPC 291 DIGITAL LOGIC FUNDAMENTALS EXAM
QUESTIONS AND 100% ACCURATE ANSWERS.
D-type flip-flops have? - One D input and one clock input
Equality is a condition in which input logic states are? - Not complimentary
You are given a defective logic circuit to troubleshoot, repair, and calibrate your first
operation is to? - Preform a general visual inspection
A standard 7400 series TTL gate? - Has a faster response time than an equivalent
CMOS gate
In the set state, the Q of a output of a set/reset flip flop - High
If the first input of a two-input NOR gate is high, the gate output? - Is low
Once the flip-flop state is established, additional inputs of the same state? - Has no
effect
In a set/reset flip-flop the two outputs, Q and not Q are? - Complimentary
An open collector designation means that the gate output? - Is composed of a collector
lead
If CLR (clear)is activated on a JK flip-flop, the Q and not Q levels are? - Low and high,
respectively
For all combinations of inputs, OR/NOR gate are? - Complimentary
To drive a TTL input from a slow rise time waveform - Use and open collector gate
An EXCLUSIVE-OR gate? - Can be used as an inverter
A set/reset flip-flop is commonly reffered to as a? - Debounce circuit
You have corrected all circuit problems in a defective logic circuit. The system appears
to function properly. Your final troubleshooting step is to? - Ensure that the system
meets all published specifications
An open collector gate? - Generally requires a pull-up at the IC output
If the inputs of a 4-input AND gate are all high, the output of the gate is? - High
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