Study RISC-V ISA Exam Questions & Answers 2024/2025
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RISC-V ISA
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RISC-V ISA
Study RISC-V ISA Exam Questions & Answers 2024/2025
How many registers are defined for an RV32I/RV64I processor? - ANSWERSx1-31 (general purpose)
+ PC (program counter)
+ x0 (hardwired zero)
===============
32 registers 32/64b wide
What four memory access instructions are supported in R...
Study RISC-V ISA Exam Questions &
Answers 2024/2025
How many registers are defined for an RV32I/RV64I processor? - ANSWERSx1-31 (general purpose)
+ PC (program counter)
+ x0 (hardwired zero)
===============
32 registers 32/64b wide
What four memory access instructions are supported in RV64I by the I-format, and how do operations of
this format interpret immediate values? - ANSWERSlb: load (8b) byte.
lh: load (16b) half word.
lw: load word (32b).
ld: load double (64b).
Operation instructions sign-extend immediates.
Ld from stack. - ANSWERSld rd, imm(sp) # load 64b from stack
Why does loading from a large offset or immediate value require multiple instructions? - ANSWERSAn
immediate is of size 12b when using loads so the effective address should be loaded into a register first if
the offset is greater than 12b which can help store the whole address (32b or 64b).
What are registers x0-4 and how are they defined? - ANSWERSx0: zero (hardwired zero)
x1: ra (return address)
x2: sp (stack pointer)
x3: gp (global pointer)
x4: tp (thread pointer)
, Prior to using a 32b immediate, use ___ (which loads the upper 20b of the destination register) for
immediate values greater than 12b. - ANSWERSlui dst, imm
What temporary registers (tN) are defined? - ANSWERSt0-6 (x5-7, x28-31)
What argument/return registers (aN) are defined? - ANSWERSa0-7
arguments: a0-7 (x10-17)
return values: a0, a1 (x10, x11)
What saved registers (sN) are defined? - ANSWERSs0-11 (x8-9, x18-27)
register x8 has what two other names? - ANSWERSs0: saved register
fp: frame pointer
Load 0xCAFEBABE into t0 in RV32I. - ANSWERSlui t0, 0xCAFEB
lw t0, 0xABE(t0)
Which registers are saved by the caller? - ANSWERSreturn address (ra)
function arguments (aN)
temporary registers (tN)
Which registers are saved by the callee? - ANSWERSstack pointer (sp)
frame pointer (fp)
saved registers (sN)
What is the difference between lui and auipc? - ANSWERSlui supports global addressing (uses the
effective address directly, rd=imm) while auipc supports relative addressing (adds upper immediate and
program counter to rd, rd=imm+PC).
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