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Samenvatting Computerarchitectuur
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Samenvatting computerarchitectuur
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Computerarchitectuur IComputerarchitectuur I
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Soorten Technologie ............................................................................................................................................................... 5
Digitale elektronica: ................................................................................................................................................................ 5
Hoofdstuk 2: Binair rekenen ................................................................................................................................................... 6
2.1. Het binair talstelsel ...................................................................................................................................................... 6
2.1.1. Voorstelling van informatie .................................................................................................................................. 6
2.1.3. Analyse .................................................................................................................................................................. 6
2.1.4. Andere talstelsels .................................................................................................................................................. 6
2.1.5. Het binair talstelsel & 2.1.6................................................................................................................................... 6
2.2. Metrisch stelsel ............................................................................................................................................................ 7
2.2.1. Decimale veelvouden ............................................................................................................................................ 7
2.2.2. veelvouden van bytes (in tabel met voorvoegsels, symbool, waarde en afwijking) ............................................ 7
2.3. Binaire combinaties.................................................................................................................................................. 7
2.4. Conversies tussen talstelsels........................................................................................................................................ 8
2.4.1. Eenvoudige conversies (Tabal bin en hexa weergeven (slide 21))....................................................................... 8
2.4.2. Conversies van en naar het decimaal talstelsel .................................................................................................... 8
2.4.3. Algemene methode (ander stelsel naar decimaal stelsel) .................................................................................... 9
2.4.4. Algemene methode (decimaal stelsel naar ander stelsel) .................................................................................... 9
2.5. Tellen in talstelsels ..................................................................................................................................................... 10
2.5.1. Tellen in decimaal stalsel .................................................................................................................................... 10
2.5.2. Tellen in binair stelsel ......................................................................................................................................... 10
2.5.3. Optellen in het decimaal stelsel .......................................................................................................................... 10
2.5.4. Optellen in het binair stelsel ............................................................................................................................... 10
2.5.5. Aftrekken in het decimaal stelsel ........................................................................................................................ 10
2.5.6. Aftrekken in het binair stelsel ............................................................................................................................. 10
2.5.7. Andere binaire bewerkingen............................................................................................................................... 11
2.6. Negatieve getallen ..................................................................................................................................................... 12
2.6.1. Teken + absolute waarde .................................................................................................................................... 12
2.6.2.Excess-N ............................................................................................................................................................... 12
2.6.3. Two’s complement.............................................................................................................................................. 12
2.7. Kommagetallen .......................................................................................................................................................... 13
2.7.1. Kommagetallen voorstellen ................................................................................................................................ 13
2.7.2. Fixed point voorstelling ....................................................................................................................................... 13
2.7.3. Floating-point voorstelling .................................................................................................................................. 13
,Computerarchitectuur I
2.7.4. Floating-point in de computer ............................................................................................................................ 13
Zie notities............................................................................................................................................................................. 13
2.8. Overflow condities ..................................................................................................................................................... 14
Signed en Unsigned ....................................................................................................................................................... 14
2.9. Foutdetecterende codes ............................................................................................................................................ 15
Eigenschappen van de foutdetecterende code ............................................................................................................ 15
2.10. Foutverbeternede codes .......................................................................................................................................... 16
Optie 1: niet verbeteren ............................................................................................................................................... 16
Optie 2: Backward error correction .............................................................................................................................. 16
Optie 3: Forward error correction ................................................................................................................................ 16
Hoofdstuk 3: Logische Poorten ............................................................................................................................................. 18
3.1. Logische Poorten ........................................................................................................................................................ 18
3.2. Implementatie van logische poorten – werking van de bipolaire transistor ............................................................. 18
3.3. De Basispoorten ......................................................................................................................................................... 19
3.3.1. De waarheidstabel => 10% Van het examen ...................................................................................................... 19
3.3.2. De basispoort NIET.............................................................................................................................................. 19
3.3.3. De basispoort EN ................................................................................................................................................. 19
3.3.4. De basispoort OF ................................................................................................................................................. 20
3.3.5. De basispoorten NEN en NOF ............................................................................................................................. 20
3.3.6. De basispoort Exclusieve OF ............................................................................................................................... 20
3.3.7. De basispoort tri-state buffer ............................................................................................................................. 21
3.3.8. Compactere notatie ................................................................................................................................................ 22
3.3.9 Een waarheidstabel opstellen .............................................................................................................................. 22
3.4. Equivalentie van schakelingen ................................................................................................................................... 25
3.5. Intermezzo: anders bekeken...................................................................................................................................... 26
3.5.1. En-poort als doorlaatfilter................................................................................................................................... 26
3.5.2. Exclusieve OF poort als flexibele invertor ........................................................................................................... 26
3.5.3. OF-poort als samensteller ................................................................................................................................... 26
3.6. Combinatorische schakelingen .................................................................................................................................. 27
3.6.1. Combinatorisch circuit - de decoder ................................................................................................................... 27
Decoder tekenen........................................................................................................................................................... 27
3.6.2. Combinatorisch circuit – de multiplexer ............................................................................................................ 28
3.6.3. Combinatorisch circuit – de optellers ................................................................................................................. 28
3.6.4. Combinatorisch circuit - Ripple Carry Adder....................................................................................................... 29
3.7. De ALU........................................................................................................................................................................ 30
3.7.1. Omschrijving....................................................................................................................................................... 30
,Computerarchitectuur I
3.7.2. werking 1-bit ALU ............................................................................................................................................... 30
3.7.3. De n-bit ALU ........................................................................................................................................................ 31
3.8. Geheugens ................................................................................................................................................................. 32
3.8.1. De SR-latch .......................................................................................................................................................... 32
3.8.2. De geklokte SR-latch ........................................................................................................................................... 32
3.8.3. De geklokte D-latch ............................................................................................................................................. 32
3.8.4. D-flip-flop ............................................................................................................................................................ 33
3.8.5. Het register ......................................................................................................................................................... 34
3.9. Het RAM geheugen .................................................................................................................................................... 35
3.9.1. Inleiding ............................................................................................................................................................... 35
3.9.2. Functie en opbouw ............................................................................................................................................. 35
3.9.3. Basisopdrachten.................................................................................................................................................. 35
3.9.4. De communicatie ................................................................................................................................................ 36
3.9.5. Het schema ......................................................................................................................................................... 36
Het Schema; dieper op in gaan ............................................................................................................................................. 36
3.9.6. De organisatie van RAM chips ............................................................................................................................ 36
3.9.7. Meerdere RAM chips .......................................................................................................................................... 37
Hoofdstuk 4: Stack en cachegeheugen ................................................................................................................................. 38
Inleiding............................................................................................................................................................................. 38
4.1. De stack ...................................................................................................................................................................... 38
4.1.1. Hardware stack ................................................................................................................................................... 38
4.1.2. Call stack ............................................................................................................................................................. 39
4.2. Cachegeheugen .......................................................................................................................................................... 39
4.2.1. Cache – werkingsprincipe ................................................................................................................................... 40
4.2.2. Direct-mapped cache .......................................................................................................................................... 40
4.2.3. Cache coherency ................................................................................................................................................. 40
Hoofdstuk 5 – De CPU, Bussen en I/O.................................................................................................................................. 41
5.1. De CPU ....................................................................................................................................................................... 41
5.1.1. De ALU................................................................................................................................................................. 41
5.1.2. De Control Unit ................................................................................................................................................... 41
5.1.3. Registers .............................................................................................................................................................. 41
5.2. De Von Neumann-cyclus ............................................................................................................................................ 42
5.3. Bussen ........................................................................................................................................................................ 43
5.3.1. Parallelle en seriële bussen ................................................................................................................................. 44
5.3.2. Stroom- en spanningsgestuurde bussen............................................................................................................. 44
5.3.3. De databus .......................................................................................................................................................... 44
, Computerarchitectuur I
5.3.4. De adresbus......................................................................................................................................................... 44
5.3.5. Bus hiërarchie ..................................................................................................................................................... 45
5.3.6. Busprotocol ......................................................................................................................................................... 45
5.3.7. Busbreedte en snelheid ...................................................................................................................................... 45
5.3.8. Gemultiplexte bus ............................................................................................................................................... 45
Mogelijke examenvragen: ..................................................................................................................................................... 46
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