5.4 Recall that we have two write policies and write allocation policies, and their combinations can be implemented either in L1 or L2 cache. Assume the following choices for L1 and L2 caches:
5.4.1 [5] <COD §§5.3, 5.8> Buffers are employed between different levels of memory hierarchy...
51 in this exercise we look at memory locality properties of matrix computation the following code is written in c
51 in this exercise we look at memory locality
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Final Exam CDA4101 Review 2022/2023
5.1 In this exercise we look at memory locality properties of matrix computation. The
following code is written in C, where elements within the same row are stored
contiguously. Assume each word is a 32-bit integer.
for (I = 0; I < 8; I++)
for (J = 0; J < 8000; J++)
A[I][J] = B[I][0] + A[J][I];
5.1.1 [5] <COD §5.1> How many 32-bit integers can be stored in a 16-byte cache
block?
5.1.2 [5] <COD §5.1> References to which variables exhibit temporal locality?
5.1.3 [5] <COD §5.1> References to which variables exhibit spatial locality?
Locality is affected by both the reference order and data layout. The same computation
can also be written below in MATLAB, which differs from C by storing matrix elements
within the same column contiguously in memory.
for I = 1:8
for J = 1:8000
A(I,J) = B(I,0) + A(J,I);
end
end
5.1.4 [5] <COD §5.1> How many 16-byte cache blocks are needed to store all 32-bit
matrix elements being referenced?
5.1.5 [5] <COD §5.1> References to which variables exhibit temporal locality?
5.1.6 [5] <COD §5.1> References to which variables exhibit spatial locality? - ANSWER
5.1.1 [5] <COD §5.1> How many 32-bit integers can be stored in a 16-byte cache
block?
5.1.2 [5] <COD §5.1> References to which variables exhibit temporal locality?
Locality is affected by both the reference order and data layout. The same computation
can also be written below in MATLAB, which differs from C by storing matrix elements
within the same column contiguously in memory.
for I = 1:8
for J = 1:8000
A(I,J) = B(I,0) + A(J,I);
end
end
, Final Exam CDA4101 Review 2022/2023
5.1.4 [5] <COD §5.1> How many 16-byte cache blocks are needed to store all 32-bit
matrix elements being referenced?
5.2 Caches are important to providing a high-performance memory hierarchy to
processors. Below is a list of 32-bit memory address references, given as word
addresses.3, 180, 43, 2, 191, 88, 190, 14, 181, 44, 186, 253
5.2.1 [10] <COD §5.3> For each of these references, identify the binary address, the
tag, and the index given a direct-mapped cache with 16 one-word blocks. Also list if
each reference is a hit or a miss, assuming the cache is initially empty.
5.2.2 [10] <COD §5.3> For each of these references, identify the binary address, the
tag, and the index given a direct-mapped cache with two-word blocks and a total size of
8 blocks. Also list if each reference is a hit or a miss, assuming the cache is initially
empty. - ANSWER 5.2.1 [10] <COD §5.3> For each of these references, identify the
binary address, the tag, and the index given a direct-mapped cache with 16 one-word
blocks. Also list if each reference is a hit or a miss, assuming the cache is initially
empty.
5.2.2 [10] <COD §5.3> For each of these references, identify the binary address, the
tag, and the index given a direct-mapped cache with two-word blocks and a total size of
8 blocks. Also list if each reference is a hit or a miss, assuming the cache is initially
empty.
5.2 Caches are important to providing a high-performance memory hierarchy to
processors. Below is a list of 32-bit memory address references, given as word
addresses.
3, 180, 43, 2, 191, 88, 190, 14, 181, 44, 186, 253
5.2.3 You are asked to optimize a cache design for the given references. There are
three direct-mapped cache designs possible, all with a total of 8 words of data: C1 has
1-word blocks, C2 has 2-word blocks, and C3 has 4-word blocks. In terms of miss rate,
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