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EECS 461 Prelab 4 University of Michigan EECS 461 $7.99   Add to cart

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EECS 461 Prelab 4 University of Michigan EECS 461

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EECS 461 Prelab 4 Declarations for pwm.c /* pwm.c University of Michigan EECS 461, Embedded Control Systems Pulse-Width Modulation using FlexTimer Module Read Chapter 45 in S32K144 User's Manual Important sections: 45.4.2: Register Descriptions 45.5.7: Edge-Aligned PWM (EPWM) Mode */ ...

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  • February 6, 2023
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EECS 461
Prelab 4
Due 02/04/2020



Declarations for pwm.c
/*
pwm.c
University of Michigan
EECS 461, Embedded Control Systems
Pulse-Width Modulation using FlexTimer Module
Read Chapter 45 in S32K144 User's Manual
Important sections:
45.4.2: Register Descriptions
45.5.7: Edge-Aligned PWM (EPWM) Mode
*/
#include "eecs461.h"
#include "pwm.h"

#define PWM_CLOCK_FREQ 10000000

/* PWM Parameters */
#define MOTOR_PORT ​B
#define MOTOR_PCR ​12
#define MOTOR_MUX ​0b001

#define FILTER_PORT ​B
#define FILTER_PCR ​8
#define FILTER_MUX ​0b001

#define DC_UPPER_LIMIT 0.76
#define DC_LOWER_LIMIT 0.24

FTM_Type * FTM_MODULE[4] = FTM_BASE_PTRS;



1. setPWM

void setPWM(int submodule, int channel, int frequency, float dutyCycle)
{
uint16_t cthres;
uint16_t cmax;
float T = 1/frequency;
float Tc = 1/PWM_CLOCK_FREQ;

cmax = ​T/Tc - 1;​ /* fill in */

, cthres = ​dutyCycle*(cmax+1)​; /* fill in */

FTM_MODULE[submodule]->MOD = ​cmax​;/* fill in */ /* Set the PWM
frequency */
FTM_MODULE[submodule]->CONTROLS[channel].CnV = ​cthres ​/* fill in */ /*
Set the PWM duty cycle */
}



2. Answer attached after code



3. initPWM

void initPWM(int submodule, int channel, int frequency, float dutyCycle)
{
uint16_t cmax;
float T = 1/frequency;
float Tc = 1/PWM_CLOCK_FREQ;

cmax = ​T/Tc - 1​;

/* 45.4.3.9 - Feature Mode Selection (MODE) */
FTM_MODULE[submodule]->MODE |= ​FTM_MODE_WPDIS(0b1)​;/* Write protect to
registers disabled (default) */

/* 45.4.3.2 - Status and Control (SC) */
FTM_MODULE[submodule]->SC = 0x00000000; /* Clear the status and control
register */
FTM_MODULE[submodule]->SC |= ​FTM_SC_CLKS(0b11)​; /* Select external
clock */

FTM_MODULE[submodule]->COMBINE = 0x00000000; /* FTM mode settings used:
DECAPENx, MCOMBINEx, COMBINEx=0 */

/* Enable the respective channel */
FTM_MODULE[submodule]->SC |= ​FTM_SC_PWMEN0(0b1)​;

/* Channel Control see S45.4.3.5 and Table 45-5 (S45.5.4) */
FTM_MODULE[submodule]->CONTROLS[channel].CnSC = 0; /* Clear the
register*/
​ FTM_MODULE[submodule]-> CONTROLS[channel].CnSC|= FTM_CnSC_MSB(1) ​; /*
MSB : Edge Align PWM */
​FTM_MODULE[submodule]-> CONTROLS[channel].CnSC|= FTM_CnSC_MSA(1)​ ; /*
MSA : Edge Align PWM */

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