CIS 480/580 Computer Architecture, Spring 2021
Project 1 & 2 – MIPS Assembler
1. Objectives
This project is designed to help students to understand the RISC architecture (MIPS) and its
instruction set and assembly.
2. Goals
Your team (2 persons) will build an MIPS assembler for a subset of ...
spring 2021 project 1 amp 2 – mips assembler 1 objectives this project is designed to help students to understand the risc architecture mips and its instruction
This project is designed to help students to understand the RISC architecture (MIPS) and its
instruction set and assembly.
2. Goals
Your team (2 persons) will build an MIPS assembler for a subset of MIPS instructions in C. This
assembler will read a simple MIPS program and generate an MIPS machine code output file.
3. Specification
Project 2 is the extension of Project 1 by including branch and jump instructions. Note that the
shaded parts in this document are Project 2 requirements. Due dates for Project 1 and 2 is March
12 and March 26, respectively.
While there are no language requirements, I will be grading your
programs using Linux, so make sure your program can easily be
compiled and run in a Linux environment. C and Java should work
without issue, C# should be fine as long as you don’t use any GUI
components.
3.1 Input
Your assembler will read and parse the contents of a simple MIPS program (program-name.asm).
Each line of the program contains an MIPS instruction or a directive. No line is blank. A label
will not appear on a line by itself. Operands are comma-separated. There will be no white spaces
between operands. No line will begin with white spaces. Lines containing instructions have the
following format:
[label:]<tab>instruction<tab>operands
Lines containing directives have the following format:
[label:]<tab>directive[<tab>operand]
The supported instructions are as follows. You may wish to consult additional MIPS references or
the textbook to know the details of the instructions.
Instruction Name Syntax Semantic
ADD Addition add $1,$2,$3 $1 = $2 + $3
SUB Subtract sub $1,$2,$3 $1 = $2 - $3
SLL Shift left logical sll $1,$2,5 $1 = $2 << 5
SRL Shift right logical srl $1,$2,5 $1 = $2 >> 5
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, SLT Set less than slt $1,$2,$3 If $2<$3, $1=1; otherwise, $1=0
ADDI Addition immediate addi $1,$2,45 $1 = $2 + 45
LUI Load upper immediate lui $1,0xA5A5 ** Upper 16-bit of $1 = 0xA5A5
(Lower 16-bit of $1 is set to 0)
ORI Or immediate ori $1,$2,0xB6B6 $1 = $2 | 0x0000 B6B6 (bitwise OR)
LW Load word lw $1,100($2) $1 = Memory[$2+100]
SW Store word sw $1,100($2) Memory[$2+100] = $1
BEQ Branch on equal beq $1,$2,Label If $1=$2, jump to Label
BNE Branch on not equal bne $1,$2,Label If $1≠$2, jump to Label
J Jump j Label Jump to Label
LA * Load address la $1,Label lui $1, upper 16-bit of Label
ori $1, $1, lower 16-bit of Label
* LA is a pseudo-instruction. It is used to load the memory location (Label, 32 bits) into
the destination register. The assembler replaces it with two instruction sequence, lui
followed by ori.
** This is just an example. We only allows decimal numbers in the assembly
program.
The supported directives are as follows.
Directive Name Syntax Semantic
.text Text segment .text Program section in memory;
(no operand) it begins at 0x0000 0200 by default
.data Data segment .data Data section in memory;
(no operand) it begins at 0x0000 0000 by default
.space n Allocation of n bytes .space 10 Allocation of 10 bytes of memory
of memory
.word w Allocation of a word . word 16 Allocation of a word (4 bytes or 32 bits)
and initialized to w and initialized to 16 (0x0001 0000).
The registers are denoted as $0, $1, $2, etc. instead of “$s0” or “r1”.
3.2 Output
The assembler generates an output file (program-name.out) of size 1KB consisting of 512B of
data segment (begins at 0x0000) and 512B of text segment (begins at 0x0200). Since each data
and instruction is 4B long, there will be at maximum 128 word data and at maximum 128
instruction words. This file can be considered a binary executable file. Do not try to open this file
as it causes an error. The assembler does not detect syntax errors and assumes the assembly input
is correctly formed. We assume big-endian.
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