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CISC 360 Final Exam Questions & Answers 2024/2025
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CISC 360 Final Exam Questions & Answers 2024/2025 What is Data Level Parallelism? - ANSWERSParallelism due to executing essentially the same code on a large number of objects. How is DLP linked to Flynn's Taxonomy? - ANSWERSLinked to SIMD and SIMT. When you have lots of cores and make co...

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  • August 7, 2024
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  • 2024/2025
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CISC 360 Final Exam Questions &
Answers 2024/2025

What is Data Level Parallelism? - ANSWERSParallelism due to executing essentially the same code on a
large number of objects.



How is DLP linked to Flynn's Taxonomy? - ANSWERSLinked to SIMD and SIMT.



When you have lots of cores and make computations go faster, you would call this____? -
ANSWERSLatency Oriented or Throughput Oriented.



What type of unit is Latency Oriented? - ANSWERSCPU.



What type of unit is Throughput Oriented? - ANSWERSGPU.



What are the characteristics of Latency Oriented designs? - ANSWERSPowerful ALU which reduces
operation latency.



Large caches that convert long latency memory accesses to short latency cache accesses.



Sophisticated control which includes Branch Prediction for reduced branch latency and Data Forwarding
for reduced data latency.



What are the characteristics of Throughput Oriented designs? - ANSWERSSmall caches that boost
Memory Throughput.



Simple control that feature no branch prediction, and data forwarding, but has more ALU devoted to
floating point computation.

,Energy efficient ALUs that have long latency, but are heavily pipelined for high throughput.



Require massive number of threads to tolerate latencies. These threads include Threading Logic and
Thread State.



What are the best applications for a CPU? - ANSWERSFor sequential parts where latency matters.



What are the best applications for a GPU? - ANSWERSFor parallel parts where throughput matters.



Can be 10x faster than CPUs for parallel code.



What is the SIMT model? - ANSWERSSingle Instruction Multiple Thread.



What is the GPU chip design? - ANSWERSGPU core is the Stream Processor.



Stream Processors are grouped in Stream Multiprocessors.



Stream Processors are basically SIMD processors.



What is a PCI Express Bus? - ANSWERSAllows transfer between chip and the GPU.



What were the versions of PCI Express? - ANSWERS1.) PCI Express (PCI-E) delivered 250MB/s per lane,
giving a total of 8GB/s for a 16 lane bus.



2.) PCI-E delivered 16GB/s for a 16 lane bus.



3.) PCI-3 Delivered 32GB/s for a 16 lane bus.



What happens when there are more lanes in a bus? - ANSWERSThe more lanes, the faster the transfer.

, What are the features of a CPU memory hierarchy? - ANSWERS1.) Big caches.



2.) Few threads.



3.) Modest memory bandwidth.



4.) Rely mainly on caches and prefetching.



What are the features of a GPU memory hierarchy? - ANSWERS1.) Small caches.



2.) Many threads.



3.) Huge memory bandwidth.



4.) Rely mainly on multi-threading.



What is the roofline model? - ANSWERSThe core perimeter is "arithmetic Intensity".



Arithmetic Intensity is the ratio of total floating-point operations to total data movement (bytes).



How do you calculate Theoretical Bandwidth? - ANSWERS(Memory Frequency x [Bus Width] / 8) x
Operations per Cycle = Bandwidth in GB/s



What do the number of operations per cycle depend on? - ANSWERSOn the core.



What is the major drawback of a CPU + GPU model? - ANSWERSData movement cost, which is when
computations are offloaded from CPU to GPU.

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