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Ecen 350 Final Exam Questions and Complete Solutions Graded A+
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Ecen 350 FinalExam Questions
and Complete
Solutions Graded
A+
Denning [Date] [Course title]
, (T/F) The fastest path through the logic determines its critical path and therefore its clock frequency. -
Answer: F
The slowest path determines the critical path and clock frequency.
Fetch, _______ and Execute are the three phases of an instruction's life-cycle. - Answer: decode
T/F There are many different possible implementations of a particular ISA in hardware. - Answer: T
T/F The B instruction does not require the register file at all. - Answer: T
T/F RTL defines the actions of an instruction in terms of operations performed on registers, with the
outcome being placed in another register. - Answer: T
T/F The register file must have three ports (two read and one write) in order to directly support D-Type
instructions. - Answer: F
D-Type instructions require at most two operands and so only two ports are needed. R-Type
require three operands (two read and one write) and so three ports are needed.
T/F
Hardware that is not in use for a given instruction (on the unified hardware) is removed until needed to
save power. - Answer: F
Hardware always exists as defined. The common processor datapath must implement the
superset of all desired instructon functions in hardware. This hardware exists regardless of
whether it is used in a given cycle.
In the LDUR and STUR instructions, the ALU is used for effective __________ calculation. - Answer:
address
For the CBZ instruction, the ALU must be set to perform the "pass _________" operation. - Answer: b
T/F For all D-Type instructions, Read Data 2 is connected to the ALU. - Answer: F
Read Data 2 is not connected to the ALU for LDUR, STUR
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