Summary

IEB Summary Information Technology Defintions

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Course
Information Technology

Institution
12th Grade

This document provides all the necessary definitions needed for IEB Information Technology. Organized by Grade and Section (System Technologies, Internet and Communication Technologies, and Data Information Management and Solution Development)

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Uploaded on April 7, 2023
Number of pages 16
Written in 2021/2022
Type Summary

information technology
ieb
hardware
software
social implications
networking
grade 10
grade 11
grade 12
system technologies
social and ethical issues
data inform
internet and communication technologies

Institution
12th Grade
Course
Information Technology
Schooljaar 200

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Summary of terms and definitions for System Technologies - Grade 10
Hardware Network applications BIOS Proprietary software
the collection of physical components Applications that use the internet or other non-volatile firmware that initialises Does not allow for the redistribution and
attached to or form part of the computer network hardware infrastructure in order hardware when the computer is started copying of software. The source code is
system to perform their function/s up not accessible. Uses activation keys.

Software Motherboard RAM Creative Commons Licence
the collection of non-physical the circuit board that holds the essential Stores data temporarily as the processor the author keeps the copyright but
components of the computer system components of a computer requires it software can be redistributed modified
such as the operating system, the and copied with acknowledgement to the
application programs and the data author

ICT CPU ROM Freeware
the way computers operate and the central processing unit stores the BIOS programs and is located The author also keeps the copyright but
communicate with each other on a chip on the motherboard the software is given away for free. The
source code is not available and the
software may not be resold

Data ALU USB Freemium software
Raw and organised facts that need to be The part of the CPU that controls and standard communication interface This is a variant of freeware. the
processed to make it useful handles logical comparisons and allowing for communication between software is free but any additional
mathematical calculations devices features will incur a cost

Information CU HDMI Source code
processed data that is organised coordinates the sequence of the A digital interface for transmitting and original code written by the programmer
structured and presented in a given instructions receiving high definition videos and
context to make it useful audio

Stand-alone applications Registers Device driver Executable code
applications that run locally on the device memory holding places for data or the operating system uses a device Source Code which has been compiled
and require nothing else to perform their instructions driver to link hardware to the software in into a file called object code
function/s such a way that the computer can
perform its tasks with an instruction
needs to send instructions to a particular
hardware device

Naomines Kabamba| 1

,Summary of terms and definitions for System Technologies - Grade 11
Operating system SDRAM System clock Data bus (bidirectional)
manages the computer's resources, The S stands for synchronous and this a microchip that regulates the timing and transfers data to and from the main
provides a user interface for a user to refers to the refreshing of the DRAM speed of all computer functions memory and into and out of the central
communicate with the computer and chips being synchronised with the CPU processing unit
loads, runs, and controls application so that the CPU does not have to wait
programs. while refreshing is taking place

Hyper-threading Latency Overclocking Control bus (unidirectional)
the process of virtually changing one the number of clock cycles that pass the process of making a computer or controls the signals from the processor
physical core into two cores thus each between when an instruction is given component run faster than the clock to other components and carries the
virtual core can process a thread, hence and when the information is available frequency specified by the manufacturer clock pulses
one physical core can process two by modifying system settings
threads simultaneously

Multi-processing Processor cache Clock multiplier Throughput
refers to having multiple cores on a stores blocks of program instructions and sets the ratio of an internal CPU clock to the actual amount of data passing
single CPU chip data that have been pre-fetched from the externally supplied clock through media or connection
RAM, in hopes that these instructions
and data will be needed next by the CPU

Static random-access memory Disk cache Clock multiplication Speed
a type of random access memory that A hardware mechanism that improves increasing the clock multiplier the amount of data passing through
does not need to constantly refresh their the time it takes to read from and write to media or connection per second
memory at stores.It is used to make the hardware desk
registers and processor cache

Dynamic random access memory Browser cache Front side bus Multitasking
random access memory that uses stores resources in web browsers in connect all the components on the when there are several programs loaded
capacitors and needs to be constantly order to improve the access speed of the motherboard onto the RAM and the CPU switches
refreshed. resources for users very short bursts of processing time
between all of the running programs
hence the user appears to be running
several programs simultaneously

Double Data Rate Web cache or proxy server cache Address bus (unidirectional) Multi-threading
Data is transferred twice every clock stores recently accessed web pages on carries the memory addresses from the when a program runs several different
pulse. a server in a network processor to other components threads concurrently this can be
achieved by each thread being run by
separate CPU or hyper-threading

Naomines Kabamba| 2

, Virtual memory Translators High-level languages Low-level languages
when RAM is full the operating system software programming tools that convert High-level languages have a high level of low-level languages are closely related
can use a section of the hard disk drive one type of code into another type of abstraction in which the underlying to machine language and generally refer
as an extension of RAM. This virtual code workings of the computer are hidden to assembly language or machine
memory extends the number of RAM from the programmer and are closer to language.
memory addresses and requires pages human languages example Java or
to be swapped between the hard disk Delphi
drive and Ram.

Assembler Interpreter Compiler IDE
converts assembly language into Reads each program line, converts it into convert a programming language is provides a programme-friendly
machine code machine code and executes it source code into machine code or environment in which the programmer
another programming language can create a program without using a
basic text editor to type in the code

UEFI Interrupt IRQ IO Range
Has a similar purpose to BIOS however a signal sent to the CPU from hardware each device receives a unique interrupt A buffer, a temporary storage area in
it has a faster start-up procedure as it or software indicating a need for the request number so that the CPU can RAM. It speeds up a slow input/output
does not require the use of a master CPU’s attention identify which device is interrupting it device so as to not violate the important
Boot Record rule that the CPU is never idle

Naomines Kabamba| 3

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