The aim of the Cambridge International AS and A Level Computer Science syllabus is to encourage learners to develop an understanding of the fundamental principles of computer science and how computer programs work in a range of contexts. Learners will study topics including information representati...
Computer Architecture RAM and ROM
• Von Neumann Architecture has one control unit, Random Access Memory (RAM)
ALU, registers and memory unit with a shared • Volatile
memory and data bus used for data and • Holds data and programs which are
instructions. currently in use
• Harvard Architecture has separate memories for • High access speeds
instructions
a and data. It is more commonly used in • Very expensive per gigabyte
embedded processors Read Only Memory (ROM)
• Von Neumann Architecture is cheaper to develop • Non-volatile (Cannot be modified)
as the control unit is simpler and allows programs • Used to store fixed instructions such
to be optimised in size. as the computer start up routine
• Harvard Architecture allows data and instructions
can be fetched in parallel and both memories can
be different sizes. Busses and Assembly Langu
Contemporary Processing • Assembly code uses mnemonics to repre
• Combines Harvard and Von Neumann architecture instructions.
• Von Neumann is used when working with data and • Instructions are divided into operand and
instructions in main memory • Opcode is the type of instruction and the h
• Harvard is used when working with cache. execute it.
• Has a separate instruction and data cache. • Operand is the address where the operati
Unit 1.1 The Characteristics of Contemporary Processors, Input, Outpu
CPU Components Flash Storage Magnetic Storage Reduced Instruction Complex In
• The ALU (Arithmetic and Logic Unit) • Fast and compact • Two magnetic states represent binary Set Computers (RISC)
carries out arithmetical and logical • Logic gates store an o Polarised sectors represent 1 • Small instruction set • Large instruct
operations. electrical charge o Unpolarised sectors represent 0 • One instruction is one • Instructions b
• The CU (Control Unit) directs operations • High represents a binary • Can be damaged by strong magnets line of machine code • Used in micro
inside the processor. 1 Hard Disk Drives • Used in personal systems
• Registers are small, fast memory cells • Low represents a binary 0 • High capacity computers • Compiler has
used to temporarily store data. • Information is stored in • Magnetic platters rotate at high speeds • Less RAM is n
Program Stores the address of blocks which are beneath a read/write head
Counter (PC) the next instruction to combined to form pages • Multiple platters are stacked to maximise Optical
be executed. • More expensive storage capacity • Use lasers to read and writ
Accumulator Stores the results of • Limited lifespan • Moving parts can become damaged • Sectors of the disc are writ
(ACC) calculations. Solid State Drives Magnetic Tape o Pits scatters light repres
Memory Holds the address in • Light and portable • An older storage medium o Lands reflects light repr
Address memory that is to be • No moving parts • Tape is round onto reels within a cartridge. • Small and light so very por
Register (MAR) written to or read • More resistant to damage • The tape drive spins the reels to move the • Easily scratched
from. from movement than hard tape across a reader • Not very fast
Memory Data Holds data which has disk drives Floppy Disks Compact Disk (CD)
Register (MDR) been read or needs • High data transfer rates • A thin magnetic disk in a plastic case. • Commonly used for audio
to be written. • Smaller capacity than • Small and portable • Stores relatively little inform
, Operating Systems (OS) Memory Management Interrupts
• Provide an interface between the • Computers often need more memory • A signal generated by hardware o
user and computer than is available and so must efficiently to tell the processor it needs atten
• Features include Memory manage the available memory and share • Have different priorities.
management, Resource it between programs. • Stored with a priority queue in an
management, File management, Paging register.
Input Output Management, Interrupt • Memory is broken down into equal sized Interrupt Service Routine
management, Utility software, parts called pages. • At the end of the fetch, decode, e
Security, User interface • Pages are swapped between main and cycle the interrupt register is chec
virtual memory. • If there is an interrupt with a highe
Algorithms Segmentation than the current task:
• A set of instructions used to solve a • Memory is split up into segments. o The contents of the registers a
set problem. • Segments can vary in size. transferred into a stack .
• Inputs must be clearly defined. • These segments represent the logical o The appropriate (ISR) is loaded
• Must always produce a valid output. flow and structure of a program. RAM.
• Must be able to handle invalid inputs. Virtual Memory o A flag is set, noting that the ISR
• Must always reach a stopping • Part of the hard drive can be used as begun.
condition. RAM. o The flag is reset when the ISR
• Must be well-documented for • Access is slower than RAM. finished.
reference. • Paging is used to move sections which o This process repeats until no m
• Must be well-commented. are not in active use into virtual memory. interrupts exist.
Unit 1.2 Software and Software Development (
Scheduling Types of Operating System Open Source Closed S
• The operating system schedule processor time between Distributed Provided along with the source Needs a license
running programs. • Runs across several devices code. Source code is n
• These are known as jobs and held in a queue. • Spreads task load across multiple No license required to use. Protected by Co
• Pre-emptive scheduling routines actively start and stop jobs computers The company pr
• Non pre-emptive routines start jobs then leave them to Embedded Online, free, community support.
support and doc
complete • Built to perform a specific small task Many individuals will work on the
Advantages Professionally de
Round Robin Routine • Built for a specific device and code meaning it is of high quality.
More secure.
• Each job is given a time slice of processor time to run in. hardware Free.
Regular updates
• When a job has used up it’s time slice it is returns to the start • Limited functionality Not always well supported or Code cannot be
of the queue and receives another. • Less resource intensive documented. to meet user nee
• This repeats until the job is complete. Multi Tasking Disadvantages
Variable quality code. License may res
First come first served routine • Allows multiple tasks to be completed Less secure. More expensive.
• Jobs are processed in the order they entered the queue simultaneously
Multilevel feedback queue routine • Uses time slicing to switch between Translators Stages of Com
• Uses multiple queues, each with a different priority applications • Covert source code into object code. Lexical Analysis
Shortest job first routine Multi User Compiler • Comments and w
• The queue is ordered by the amount of processor time • Several users can use a single • Translates code all in one go. removed
needed. computer • Compilation process is longer. • Identifiers and ke
• The shortest jobs are completed first. • A scheduling algorithm allocates • Produces platform specific code. replaced with tok
Shortest time remaining routine processor time between jobs • Complied code can be run without a • Token info stored
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