Summary
Summary A-Level Processor Components
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- OCR
Notes on OCR Computer Science A-Level Processor Components
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Processor ComponentsCentral Processing Unit(CPU): Processor has number of different components each with their own role.
Components including: CU, Buses, ALU and registers
Control Unit- part of processor that coordinates activity of all components. Control signals sent along
control bus between CU and other components.
Control Signals include:
Memory Read- Causes data from the addressed location in RAM to be placed on data bus.
Memory Write- Causes data on data bus to be written into the addressed location in RAM.
Bus Request- Indicates that a device is requesting the use of a data bus
Bus Grant- Indicates that the CPU has granted access to the data bus
Clock:- Synchronizes operations
Arithmetic Logic Unit- Solves Logical, Boolean and Arithmetic problems, shifts as well.
OPERAND- Specifies data/ address of the data
Accumulator- Stores the results from the ALU.
Registers include:
Program Counter (PC)- Holds memory address of the next instruction to be executed
Current Instruction Register (CIR)- Holds current instruction, split into OPCODE and OPERAND
Memory Address Register (MAR)- Holds address in memory where the processor is needed to
fetch/store data
Memory Data Register (MDR)- Temporaril holds data moving between processor and main memory
Accumulator- to hold intermediate results of an instruction. Can have multiple accumulators.
Buses- Buses in computer made up of series of connectors that transfer signals between internal
components.
System Bus-Consists of three separate buses carrying control signals, addresses and data. The buses are:
Control, Data and Address.
Processor Role- Carry out instructions from programs stored in memory. CU coordinates components to
work together.
Fetch-Execute Cycle: Processors operate in clear stages that are used to carry out programming
instructions. Repeated for each instruction.
1. Address of next instruction copied from PC to MAR.
2. Instruction held at address copied to MDR.
3. Simultaneously, PC contents are incremented.
4. Contents of MDR copied to CIR.
5. Instruction held in CIR is decoded.
6. Split into OPERAND and OPCODE determining the type of instruction. Additional data fetched from
memory and passed to accumulator.
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