WGU C952 Computer Architecture Problem Solving Exam Questions and With Distinction level Marking scheme updated 2024/2025
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WGU C952 Computer Architecture
Institution
WGU C952 Computer Architecture
WGU C952 Computer Architecture Problem Solving Exam Questions and With Distinction level Marking scheme updated 2024/2025
Pipeline stall (bubble) - correct answer a stall initiated in order to resolve a hazard
Load-use data hazard: - correct answer A specific form of data hazard in which the ...
WGU C952 Computer Architecture Problem Solving
Exam Questions and With Distinction level Marking
scheme updated 2024/2025
Pipeline stall (bubble) - correct answer a stall initiated in order to resolve a hazard
Load-use data hazard: - correct answer A specific form of data hazard in which the
data being loaded by a load instruction has not yet become available when it is needed
by another instruction.
control hazard (branch hazard) - correct answer When the proper instruction cannot
execute in the proper pipeline clock cycle because the instruction that was fetched is
not the one that is needed; that is, the flow of instruction addresses is not what the
pipeline expected.
Branch prediction - correct answer A method of resolving a branch hazard that
assumes a given outcome for the branch and proceeds from that assumption rather
than waiting to ascertain the actual outcome.
five-stage pipeline - correct answer five instructions will be in execution during any
single clock cycle
1. IF - instruction fetch
2. ID - instruction decode and register file read
3. EX - execution or address calculation
4. MEM - data memory access
5. WB - write back
Instruction Fetch (IF) - correct answer Move instruction from memory to the control unit
, Instruction decode (ID) - correct answer Pull apart the instruction, set up the operation
in the ALU, and compute the source and destination operand addresses
Execute (EX) - correct answer ALU is used to perform the instruction's operation or to
compute an address, or an adder is used for branches; both are depicted using an ALU
symbol.
Data memory access (MEM) - correct answer the data memory (DM) may be read (for
a load instruction) or written (for a store instruction). For load, the right half is shaded,
indicating read. (For store, the left half would be shaded).
Write back (WB) - correct answer the register file (Reg) may be written by certain
instructions (like R-type instructions). The left half is shaded to indicate write (vs. read).
Although two Reg icons appear in the stylized depictions, only one register file exists.
Branch prediction buffer - correct answer Also called branch history table. A small
memory that is indexed by the lower portion of the address of the branch instruction and
that contains one or more bits indicating whether the branch was recently taken or not.
Dynamic branch prediction - correct answer prediction of branches at runtime using
runtime information
Branch target buffer - correct answer A structure that caches the destination PC or
destination instruction for a branch. It is usually organized as a cache with tags, making
it more costly than a simple prediction buffer.
Correlating predictor - correct answer A branch predictor that combines local behavior
of a particular branch and global information about the behavior of some recent number
of executed branches.
Tournament branch predictor - correct answer A branch predictor with multiple
predictions for each branch and a selection mechanism that chooses which predictor to
enable for a given branch.
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