HC7 Computer Systems
- CPU evolution
• The x86-64 architecture is a Complex Instruction Set Computer (CISC): many different instructions with
different formats (RISC on lower level)
◦ Intel Core i9-13900K has 8 P-Cores (performance cores) and 16 E-Cores (efficient cores)
• Moore’s law: “number of transistors in CPUs will double every year, for the next 10 years”
◦ Actually: number of transistors has doubled every 18 months, for the next 50 years
- From C to executable → Converting high-level code to machine executable
• Converting C code in hello.c to the executable code hello has several
intermediate steps:
◦ First the compiler converts hello.c to human-readable x86-64 assembly
code hello.s
◦ Next the GNU assembler gas can expand the assembly code to the object
code hello.o. The object code is a binary encoding of assembly
instructions but misses the links to other code parts and to the OS.
◦ Finally the linker will combine the object code with other object code files
and the necessary OS libraries to produce the executable code
• Assembly instructions range in length from 1 to 15 bytes
• Why should we learn assembly?
◦ Code in high-level programming languages is easier to debug and
maintain
◦ Compilers can produce fairly optimized assembly code
◦ Code in high-level languages can be easily transferred to different devices, while assembly is
machine-specific
- Assembly basics
• To interact with the CPU and the memory of the computer system we will
learn the Instruction Set Architecture (ISA)
• Using the x86-64 ISA we can interact with the computer system without
knowing the microarchitecture i.e. the circuit-level details
• The register file stores a small amount of data that we need to process.
The memory stores the code and further data needed.
• The Arithmetic Logic Unit (ALU) carries out all types of instructions:
arithmetic computations, memory/peripheral access and others
- Register File
• The 8086 architecture had 8 registers %ax, %bx, ..., %sp storing 16 bits each
• Their lower 8-bit parts of these registers %al, %bl, ..., %spl were also accessible
• The addb instruction will add the contents of registers
%al and %bl and store the result in %bl
• This addition operates on 8-bit integers thus we put the
suffix b (byte) after the add
! floating point arithmetic is distinct from integer arithmetic
, - Moving Data → between the register file and the ALU
• Using the mov we can copy-paste data from a source location to a destination location.
• mov instruction format; the source and destination operands of the mov instruction are registers:
◦ mov[suffix] Register, Register
• The suffix must match the size of the register, the following instructions are invalid:
◦ movq %ebx, %rcx; we try to get 8 bytes from a 4-byte register
◦ movq %rcx, %ebx; we try to put 8 bytes to a 4-byte register
◦ movl %ebx, %rcx; we try to put 4 bytes to an 8-byte register
• Be careful with register overflow
◦ movb $255, %al; %al = 0xff
◦ movb $257, %al; %al = 0x01 due to truncation
- Memory → Fetching data from/to the memory
• The flat memory model:
every cell has a 64-bit address (264 bytes)
• Indirect memory addressing: access the memory address using ()
◦ movq (%rbx), %rdx →
• We can also use the reverse mov instruction to store to memory.
The following will transfer 4 bytes from %edx to the address stored in
%rbx.
◦ movl %edx, (%rbx)
• Base & displacement memory addressing:
• Let the base address %r11 = 0x00000000000000a2 and
%rax = 0x0000000000000004. The following instructions adjust
the base with an immediate offset and a register index →
◦ movw -3(%r11, %rax), %cx;
• Scaled indexed memory addressing:
• Let the base address %r11 = 0x00000000000000a0 and
%rax = 0x0000000000000002. Consider the following instruction:
◦ movl -5(%r11, %rax, 4), %ecx
◦ mov[suffix] Immediate(Base, Index, Scale), Destination
• The effective address is computed using the formula:
◦ Address = Immediate + Base + Scale * Index,
with Scale = 1,2,4,8
