To provide a detailed description of various ways of organizing memory hardware
To discuss various memory-management techniques, including paging and segmentation
To provide a detailed description of the Intel Pentium, which supports both pure segmentation and
segmentation with paging
Program must be brought (from disk) into memory and placed within a process for it to be run
Main memory and registers are only storage CPU can access directly
Register access in one CPU clock (or less)
Main memory can take many cycles
Cache sits between main memory and CPU registers
Protection of memory required to ensure correct operation
Base and Limit Registers
A pair of base and limit registers define the logical address space
Binding of Instructions and Data to Memory
Address binding of instructions and data to memory addresses can happen at three different stages
Compile time: If memory location known a priori, absolute code can be generated; must recompile
code if starting location changes
Load time: Must generate relocatable code if memory location is not known at compile time
Execution time: Binding delayed until run time if the process can be moved during its execution from
one memory segment to another. Need hardware support for address maps (e.g., base and limit
registers)
Dept. of Computer Science and Engineering Page 68
,Multistep Processing of a User Program
Logical vs. Physical Address Space
The concept of a logical address space that is bound to a separate physical address space is central to
proper memory management
Logical address – generated by the CPU; also referred to as virtual address
Physical address – address seen by the memory unit
Logical and physical addresses are the same in compile-time and load-time address-binding schemes;
logical (virtual) and physical addresses differ in execution-time address-binding scheme
Dept. of Computer Science and Engineering Page 69
,Memory-Management Unit (MMU)
Hardware device that maps virtual to physical address
In MMU scheme, the value in the relocation register is added to every address generated by a user
process at the time it is sent to memory
The user program deals with logical addresses; it never sees the real physical addresses
Dynamic relocation using a relocation register
Dynamic Loading
Routine is not loaded until it is called
Better memory-space utilization; unused routine is never loaded
Useful when large amounts of code are needed to handle infrequently occurring cases
No special support from the operating system is required implemented through program design
Dynamic Linking
Linking postponed until execution time
Small piece of code, stub, used to locate the appropriate memory-resident library routine
Stub replaces itself with the address of the routine, and executes the routine
Operating system needed to check if routine is in processes’ memory address
Dynamic linking is particularly useful for libraries
System also known as shared libraries
Swapping
A process can be swapped temporarily out of memory to a backing store, and then brought back into memory
for continued executionnBacking store – fast disk large enough to accommodate copies of all memory images
for all users; must provide direct access to these memory imagesnRoll out, roll in – swapping variant used for
priority-based scheduling algorithms; lower-priority process is swapped out so higher-priority process can be
loaded and executednMajor part of swap time is transfer time; total transfer time is directly proportional to the
amount of memory swappednModified versions of swapping are found on many systems (i.e., UNIX, Linux,
and Windows)
System maintains a ready queue of ready-to-run processes which have memory images on disk
Dept. of Computer Science and Engineering Page 70
, Shri Vishnu Engineering College for Women
Schematic View of Swapping
Contiguous Allocation
Main memory usually into two partitions:
Resident operating system, usually held in low memory with interrupt vector
User processes then held in high memorynRelocation registers used to protect user processes from each
other, and from changing operating-system code and data
Base register contains value of smallest physical address
Limit register contains range of logical addresses – each logical address must be less than the limit
register
MMU maps logical address dynamically
Hardware Support for Relocation and Limit Registers
Multiple-partition allocation
Hole – block of available memory; holes of various size are scattered throughout memory
When a process arrives, it is allocated memory from a hole large enough to accommodate it
Dept. of Computer Science and Engineering Page 71
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